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FPGA-Based Rate-Adaptive Spatially-Coupled LDPC Codes for Optical Communications
This invention discloses a rate-adaptive forward error correction (FEC) scheme based on spatially-coupled (SC) LDPC codes derived from quasi-cyclic (QC) LDPC codes with its field programmable gate array (FPGA) architecture. FPGA emulation demonstrates that the proposed LDPC codes provide larger coding gain and smaller error floor compared to the QC-LDPC...
Published: 7/15/2022   |   Inventor(s): Ivan Djordjevic, Xiaole Sun
Category(s): Technology Classifications > Engineering & Physical Sciences > Communications & Networking